Method for manufacturing circuit devices

专利名称：Method for manufacturing circuit devices发明人：Yusuke Igarashi,Noriaki Sakamoto申请号：US10668492申请日：20030923公开号：US07045393B2公开日：20060516

专利附图：

摘要：Conventionally, semiconductor devices wherein a flexible sheet with aconductive pattern was employed as a supporting substrate, a semiconductor elementwas mounted thereon, and the ensemble was molded have been developed. In this case,problems occur that a multilayer wiring structure cannot be formed and warping of the

insulating resin sheet in the manufacturing process is prominent. In order to solve theseproblems, a laminated plate () in which a thin first conductive film () and a thick secondconductive film () have been laminated via a third conductive film () is used. In a step forforming a conductive wiring layer (A) by etching the first conductive film (), etching depthcan be controlled by stopping etching at the third conductive film (). Accordingly, formingthe first conductive film () to be thin makes it possible to form the conductive wiring layer(A) into a fine pattern.

申请人：Yusuke Igarashi,Noriaki Sakamoto

地址：Gunma JP,Gunma JP

国籍：JP,JP

代理机构：Fish & Richardson P.C.

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